STW33N20 n - channel enhancement mode power mosfet n typical r ds(on) = 0.073 w n avalanche rugged technology n 100% avalanche tested n repetitive avalanche data at 100 o c n low gate charge n high current capability n 150 o c operating temperature n application oriented characterization applications n high current, high speed switching n solenoid and relay drivers n dc-dc converters & dc-ac inverters n telecommunication power supplies n industrial motor drives internal schematic diagram absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v gs = 0) 200 v v dgr drain- gate voltage (r gs = 20 k w ) 200 v v gs gate-source voltage 20 v i d drain current (continuous) at t c = 25 o c33a i d drain current (continuous) at t c = 100 o c20a i dm ( ) drain current (pulsed) 132 a p tot total dissipation at t c = 25 o c 180 w derating factor 1.44 w/ o c t stg storage temperature -65 to 150 o c t j max. operating junction temperature 150 o c ( ) pulse width limited by safe operating area type v dss r ds(on) i d STW33N20 200 v < 0.085 w 33 a october 1997 1 2 3 to-247 1/9
thermal data r thj-case r thj-amb r thc-sink t l thermal resistance junction-case max thermal resistance junction-ambient max thermal resistance case-sink typ maximum lead temperature for soldering purpose 0.66 30 0.1 300 o c/w oc/w o c/w o c avalanche characteristics symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max, d < 1%) 33 a e as single pulse avalanche energy (starting t j = 25 o c, i d = i ar , v dd = 50 v) 600 mj electrical characteristics (t case = 25 o c unless otherwise specified) off symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 m a v gs = 0 200 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 100 o c 10 100 m a m a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na on ( * ) symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 m a 234v r ds(on) static drain-source on resistance v gs = 10 v i d = 16 a 0.073 0.085 w i d(on) on state drain current v ds > i d(on) x r ds(on)max v gs = 10 v 33 a dynamic symbol parameter test conditions min. typ. max. unit g fs ( * ) forward transconductance v ds > i d(on) x r ds(on)max i d = 16 a 10 22 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25 v f = 1 mhz v gs = 0 3500 550 120 4500 700 160 pf pf pf STW33N20 2/9
electrical characteristics (continued) switching on symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on time rise time v dd = 100 v i d = 16 a r g = 4.7 w v gs = 10 v (see test circuit, figure 3) 25 50 40 70 ns ns (di/dt) on turn-on current slope v dd = 160 v i d = 33 a r g = 4.7 w v gs = 10 v (see test circuit, figure 5) 800 a/ m s q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 160 v i d = 33 a v gs = 10 v 110 17 50 160 nc nc nc switching off symbol parameter test conditions min. typ. max. unit t r(voff) t f t c off-voltage rise time fall time cross-over time v dd = 160 v i d = 33 a r g = 4.7 w v gs = 10 v (see test circuit, figure 5) 30 30 60 45 45 90 ns ns ns source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 33 132 a a v sd ( * ) forward on voltage i sd = 10 a v gs = 0 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 33 a di/dt = 100 a/ m s v dd = 100 v t j = 150 o c (see test circuit, figure 5) 400 5.6 28 ns m c a ( * ) pulsed: pulse duration = 300 m s, duty cycle 1.5 % ( ) pulse width limited by safe operating area safe operating area thermal impedance STW33N20 3/9
derating curve transfer characteristics static drain-source on resistance output characteristics transconductance gate charge vs gate-source voltage STW33N20 4/9
capacitance variations normalized on resistance vs temperature turn-off drain-source voltage slope normalized gate threshold voltage vs temperature turn-on current s lope cross-over time STW33N20 5/9
switching safe operating area source-drain diode forward characteristics fig. 1: unclamped inductive load test circuit accidental overload area fig. 2: unclamped inductive waveform STW33N20 6/9
fig. 3: switching times test circuits for resistive load fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit STW33N20 7/9
dim. mm inch min. typ. max. min. typ. max. a 4.7 5.3 0.185 0.209 d 2.2 2.6 0.087 0.102 e 0.4 0.8 0.016 0.031 f 1 1.4 0.039 0.055 f3 2 2.4 0.079 0.094 f4 3 3.4 0.118 0.134 g 10.9 0.429 h 15.3 15.9 0.602 0.626 l 19.7 20.3 0.776 0.779 l3 14.2 14.8 0.559 0.413 0.582 l4 34.6 1.362 l5 5.5 0.217 m 2 3 0.079 0.118 dia 3.55 3.65 0.140 0.144 p025p to-247 mechanical data STW33N20 8/9
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications ment ioned in this publication are subject to change without noti ce. this publication supersedes and replaces all info rmation previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in l ife support dev ices or systems without express written approval of s gs-thomson microelectonics. ? 1997 sgs-thomson microelectronics - printed in it aly - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - hong kong - i taly - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a . . . STW33N20 9/9
|
